The present invention relates, in general, to electronics, and more particularly, to semiconductors, structures thereof, and methods of forming semiconductor devices.
As electronic products are becoming smaller in size and are required to be highly functional, a variety of techniques of providing high capacity semiconductor modules have been researched and developed. One of the techniques of providing high capacity semiconductor modules has been to increase capacity of a memory chip, that is, to achieve high integration of memory chips or memory devices. The high integration of memory devices can be achieved by packing as many cells as possible into a limited semiconductor chip space. However, the high integration of memory devices in this way has required high accuracy in fine line widths, consequently requiring highly sophisticated techniques and taking a great deal of time to develop.
Accordingly, it is desired to have an alternative structure and method for providing high capacity semiconductor modules.
For simplicity and clarity of illustration, elements in the figures are not necessarily drawn to scale, and the same reference numbers in different figures denote generally the same elements. Additionally, descriptions and details of well-known steps and elements are omitted for simplicity of the description. It will be appreciated by those skilled in the art that words, during, while, and when as used herein related to circuit operation are not exact terms that mean an action takes place instantly upon an initiating action but that there may be some small but reasonable delay, such as propagation delay, between the reaction that is initiated by the initial action. Additionally, the term while means a certain action occurs at least within some portion of a duration of the initiating action. The use of word approximately or substantially means a value of an element is expected to be close to a state value or position. However, as is well known in the art there are always minor variances preventing values or positions from being exactly stated. As used herein, the singular forms are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be understood that, although the terms first, second, etc. may be used herein to describe various members, elements, regions, layers and/or parts, these members, elements, regions, layers and/or parts are not be limited by these terms. These terms are only used to distinguish one member, element, region, layer and/or part from another member, element, region, layer and/or part. Thus, for example, a first member, element, region, layer and/or part discussed below could be termed a second member, element, region, layer and/or part without departing from the teachings of the present invention.